Circuit verification

Use circuit_erc and circuit_drc, not an LLM report, as the source of truth.
The runtime verdict passes only when errors == 0 and DRC unconnected == 0;
warnings do not fail the verdict. Missing output, process failure, and malformed
JSON are fail-closed. A KiCad jobset is a declarative export set and its ERC/DRC
reports are compared with direct reports for self-consistency. circuit_render
provides visual review evidence (kind: board3d camera views,
schematic page plots, layers per-layer plots) and circuit_diff provides
change evidence (format: json, png, svg); neither can replace
deterministic gates. Supported exports are gerbers, drill, pos,
bom, netlist, pdf-sch, step, sch_pdf, sch_svg, pcb_pdf, pcb_svg,
dxf, ipc2581, odb, gencad, vrml, glb, and fp_svg
(footprint-library directory to per-footprint SVG).

Before accepting a PCB layout containing connectors, call
circuit_connector_placement_check with the board and a reference-to-PartSpec
map. A connector with an unknown mating envelope or no PartSpec fails closed;
resolve its HumanRequest and every board-edge or mating-clearance finding before
running DRC.

A vision-capable review records each inspected image as a
circuit-reports/review-visual-<slug>.advisory.json with tool: "vision_review"
and detail {image_path, image_sha256, model, checklist, impression, findings} —
checklist is the artifact kind (board_top|board_bottom|board_side| board_isometric|board_layers|schematic|footprint), impression is a
required free-text field (the reviewer's subjective reading of the
drawing — a record without one is discarded), and each finding is
{category, severity (error|warning|info), note, bbox?} — see
src/circuit/advisory.py VisualReviewDetail for the contract. Findings stay
advisory; circuit_render/circuit_diff/file_editor view image
observations are provenance-logged to
observations/circuit/image-observations.jsonl.